1. Field of the Invention
This invention relates generally to the fabrication of semi-conductor devices, by photo lithographic processes and more particularly to preventing unwanted electrical contact between different regions of the semi-conductor devices.
In the formation of semi-conductor devices it is necessary to both provide desired electrical contact between certain regions of the devices formed and also to prevent contact between various other regions of the devices formed on the substrate. Conventionally, one technique for accomplishing this is by utilizing photoresist and masking techniques wherein those areas to be exposed for electrical contact are patterned in the photoresist, and then by developing the patterned photoresist, to thereby expose the desired underlying regions. This technique normally requires several successive masks to perform the entire process, and in its performance each succeeding mask must be precisely aligned with the previously exposed and developed structure to insure that only the desired regions are ultimately exposed, and other regions remain covered or protected, or additional masking may be required. However, as the technology advances, allowing for formation of smaller and smaller devices, it is increasingly difficult to maintain precise overlay tolerance, with the result that even small misalignments of the masks will result in the exposure of small portions or "borders" of regions that are intended to remain covered. Hence, electrical connections, e.g. by an overlay deposition of a metal will connect not only the desired locations but also those exposed border portions of the undesired locations.
Thus it is a principal object of this invention to provide a technique applicable to the production of semi-conductor devices by photolithographic processes in which exposed regions of the same material, such as polysilicon, can be selectively masked to prevent unintended contact with the selectively masked regions thus providing what are known as borderless contacts.